Ebook details

RISC-V is reshaping processor innovation with its open and extensible instruction set architecture. But how are high-performance RISC-V digital signal processors (DSPs) designed in practice? This book explores that question through SpringCore, a RISC-V DSP architecture developed for real-time embedded control systems.
Using SpringCore as a case study, the book introduces the architecture of a modern DSP processor and explains key digital design techniques used in its implementation. You will explore DSP architecture concepts, design custom ISA extensions for fixed-point and floating-point acceleration, and examine an 8-stage pipelined processor with hazard handling, zero-overhead loops, a Harvard memory architecture, protection mechanisms, and interrupt handling. The book also covers the surrounding software ecosystem, including an LLVM-based toolchain, debugging with OpenOCD and JTAG, development with an Eclipse-based IDE, and simulation support using tools such as gem5. Finally, it demonstrates how the SpringCore architecture is implemented in the FDM320RV335 DSP chip, which runs at 150 MHz and integrates peripherals such as an ADC and PWM for real-time industrial control.
By the end, you will understand key DSP hardware architecture and custom ISA design principles through the practical example of SpringCore.